preliminary sm9501b seiko npc corporation ? radio controlled clock receiver ic overview the sm9501b is a bicmos rcc *1 receiver ic. it accepts low frequency standard wave input received from an external antenna, ampli?s it, detects the data signal, and outputs a digital time code signal. *1 : radio controlled clock features operating supply voltage range: 4.5 to 5.5v operating current consumption: 55 a (typ) @5v standby current consumption: 0.1 a (max) @5v high sensitivity: 0.5 vrms input wide frequency range (35khz to 80khz) include analog switch for antennatuning capaci- tors change agc gain hold function external crystal ?ter connection bicmos process package:16-pin vsop ordering information pinout (top view) package dimensions (unit: mm) device package SM9501BV 16-pin vsop vdda 1 in1 in3 in2 16 vdd pon out vss fcn xo vssa xi 8 hldn cp cb 9 lf 6.4 ?0.2 4.4 ?0.2 0.275typ 5.1 ?0.2 0.65 0.12 0.10 m 0.22 ? 0.05 + 0.1 1.15 ?0.1 0.10 ?0.05 0.15 ? 0.05 + 0.1 0.5 ?0.2 0 to 10
preliminary sm9501b seiko npc corporation ? block diagram pin description number name i/o 1 1. i: input, o: output, ipu: input with pull-up resistor, ? supply pin a/d 2 2. a: analog signal, d: digital signal description 1 vdda ? a agc ampli?r (+) supply input 2 in1 i a antenna input 1 (?ed input) 3 in3 i a antenna input 3 (via analog switch) 4 in2 i a antenna input 2 (analog switch bypass) 5 fcn ipu d analog switch control input (active low) 6 xo o a output for crystal ?ter 7 vssa ? a agc ampli?r (? supply input 8 xi i a input from crystal ?ter 9 lf o a recti?r lpf capacitor connection 10 cb o a bottom hold detector capacitor connection 11 cp o a peak hold detector capacitor connection 12 hldn ipu d agc gain hold control (active low) 13 vss ? a substrate (? supply input 14 out o d clock time code output (active low) 15 pon ipu d standby state control input (active low) 16 vdd ? a (+) supply input ? tn ipu d agc ampli?r gain control switch (active low, for test mode) vdda vss vdd cp agc control peak/bottom hold det. decoder cb hldn pon bias rectifier lpf agc amp xi fcn out lf xo vssa post amp in1 in3 in2
preliminary sm9501b seiko npc corporation ? specifications absolute maximum ratings v ss = 0v recommended operating conditions v ss = 0v parameter symbol condition rating unit supply voltage range v dd ? 0.3 to +7.0 v input voltage range v in ? 0.3 to v dd +0.3 v power dissipation p d 150 mw storage temperature range t stg ? 55 to +125 c parameter symbol condition rating unit supply voltage range v dd 4.5 to 5.5 v operating temperature range t opr ? 40 to +85 c
preliminary sm9501b seiko npc corporation ? electrical characteristics v dd = 4.5 to 5.5v, v ss = 0v, ta = ? 40 to +85 c unless otherwise noted. parameter symbol condition rating unit min typ max supply voltage v dd 4.5 5.0 5.5 v maximum operating current consumption 1 1. measured using the standard circuit. i ddm v dd = 5.0v, ta = 25 c, no input signal, pon: vss, out: open 65 100 ? operating current consumption 1 i ddt v dd = 5.0v, ta = 25 c, 500ms pulsewidth, 0.1mvrms input (differential input), pon: vss, out: open ?5 a standby mode current consumption i st pon: vdd or open, fcn: vdd or open, hldn: vdd or open 0.1 ? minimum input voltage range v fmin in1?n2 differential input, fin = 40khz, 60khz ta = 25 c 0.5 1.0 ?rms maximum input voltage range v fmax in1?n2 differential input, fin = 40khz, 60khz 80 mvrms input frequency f in in1?n2 differential input 35 80 khz analog switch resistance r a v in2 = 0v, v in3 = 50mv 15 ? startup time 2 2. the time taken under stable wave input conditions from when power is applied or standby is released, using pon, until stable digital output occurs within ratings. t on when supply is applied 8 sec startup time 2 (pon) t pon from standby mode 8 sec gain hold time t hld ?3db change 1 sec input voltage v il pon, fcn, hldn pins 0.5 v v ih pon, fcn, hldn pins 0.8v dd v input current i il v il = 0v, pon, fcn, hldn pins ?.2 ? i ih v ih = v dd , pon, fcn, hldn pins 0.1 ? low-level output current i ol v dd = 4.5v, out = 0.5v 10 ? high-level output current i oh v dd = 4.5v, out = 4.0v ?0 ? fall time output propagation delay 3 3. the time taken, with 10:1 input signal amplitude ratio and 500ms pulsewidth, from when a change in signal input occurs until the output out changes. note that this characteristic is very dependent on the antenna and crystal ?ter characteristics. the standard crystal used her e has the following equiv- alent circuit coef?ients. t dn fin = 40/60khz, standard crystal, npc standard jig v in = 1 vrms to 80mvrms 160 ms rise time output propagation delay 3 t up 200 ms low-level output pulsewidth 4 (200ms) 4. values obtained when using the standard crystal employed here. note that these values are dependent on the crystal character istics, and should be considered as reference values. t 200 100 200 300 ms low-level output pulsewidth 4 (500ms) t 500 400 500 650 ms low-level output pulsewidth 4 (800ms) t 800 700 800 900 ms noise rejection ratio 5 5. time averaged rms values, where the noise is white noise and the measurement bandwidth is determined by the crystal ?ter eq uivalent used in the standard circuit. s/n 9db f [khz] l 1 [kh] c 1 [ff] r 1 [k ? ]c 0 [pf] 40 6.70280 2.36228 11.4492 1.42773 60 5.17396 1.36007 13.4826 1.04927 l 1 c 0 r 1 c 1
preliminary sm9501b seiko npc corporation ? standard circuit application circuit *1. these values are obtained when using npc's standard crystal and should be considered as reference values. in case of using differnt crystal, the values are different. *1. these values are obtained when using npc's standard crystal and should be considered as reference values. in case of using differnt crystal, the values are different. vdda in1 in3 in2 fcn xo vssa xi + 40khz 60khz 5.1k ? 100k ? ? 50 ? 0.22 f lf cb cp hldn vss out pon vdd 12pf 12pf *1 1 f 1 f v dd 0.1 f vdda in1 in3 in2 fcn xo vssa xi 40khz 60khz 5.1k ? 100k ? 0.22 f lf cb cp hldn vss out pon vdd 12pf 12pf *1 1 f 1 f v dd 0.1 f controller ant.
preliminary sm9501b seiko npc corporation ? functional description antenna input and tuning capacitor switching function there are three antenna inputs: in1, in2, and in3. when fcn is open (or high), the internal analog switch is off and in1 in2 are the antenna inputs (60khz mode). when fcn is low, the analog switch is on, con- necting in3 and in2. c2 is then connected in parallel to c1 in the tuning circuit, reducing the resonant fre- quency (40khz mode). fcn should be left open if not using the tuning capacitor switching function, and in2 should be connected to in3 externally. agc ampli?r and gain hold function the input voltage from the antenna is ampli ed by the agc ampli er. the gain can be monitored by the volt- age on pin cp, and can be changed by varying the cp voltage. an external capacitor cp can be connected to cp to stabilize the voltage, but the gain tracking time is dependent on the capacitance. when hldn is open (or high), the gain automatically adjusts to follow the post-ampli er detector signal. when hldn is low, the immediately preceding gain is held for an interval determined by the cp capacitance. fcn analog switch antenna input tuning capacitor receiver frequency open or high off between in1 and in2 c1 60khz low on between in1 and in2, in3 c1 + c2 parallel 40khz in1 in3 in2 c2 c1 l1 fcn agc hldn gain tracking open or high auto tracking low gain held ?ed agc amp peak hold detector bottom hold detector hldn cp cb cb cp
preliminary sm9501b seiko npc corporation ? crystal filter circuit external crystals are used as lters. multiple frequencies (40khz and 60khz) are supported by connecting crystals in parallel. the center frequency and bandwidth of the lters is determined by the crystal characteris- tics. if the center frequency is lower than the target frequency, c 40 and c 60 can be added to change the res- onant frequency. and r 40 and r 60 can be added to adjust the lter q factor. internally, pin xo is linked to pin xi by a phase-inverted signal passed through a capacitor, which cancels the high-frequency components that pass through the crystal parallel capacitances. detector circuit the ampli ed signal is full-wave recti ed and passed through a lowpass lter detector. the detector output is input to peak hold (pin cp) and bottom hold (pin cb) circuits to form the decoder reference potentials and peak hold potential for agc control. decoder circuit the detector output and peak/bottom hold mid-level potential reference are used to decode the time code sig- nal, which is output on pin out. the output is active-low, so that the output is low when the input ampli- tude is high. standby function when pon is open (or high), the device is in standby mode and the current consumption is reduced. receiver operation starts when pon goes low. pon mode out open (or high) standby high low operating time code xo rx40 rx60 cx40 cx60 40khz 60khz xi amplifier rectifier lpf peak/ bottom hold bottom hold peak hold v ss potential v ss potential v ss potential bottom hold peak hold mid-level potential decoder out output v ss potential lpf waveform v dd potential v ss potential v ss potential rectifier lpf peak/ bottom hold
preliminary sm9501b seiko npc corporation ? np0706ae 2007.07 please pay your attention to the following points at time of using the products shown in this document. the products shown in this document (hereinafter ?roducts? are not intended to be used for the apparatus that exerts harmful in?ence on human lives due to the defects, failure or malfunction of the products. customers are requested to obtain prior written agreeme nt for such use from seiko npc corporation (hereinafter ?pc?. customers shall be solely responsible for, and indemnify and hold npc free and harmless from, any and all claims, damages, losses, expenses or lawsuits, due to such use without such agreement. npc reserves the right to change the speci?ations of the products in order to improve the characteristic or reliability thereof. npc makes no claim o r warranty that the contents described in this document dose not infringe any intellectual property right or other similar right owned by third parties. therefore, npc shall not be responsible for such problems, even if the use is in accordance with the descriptions provided in t his document. any descriptions including applications, circuits, and the parameters of the products in this document are for reference to use the products, and shall not be guaranteed free from defect, inapplicability to the design for the mass-production products without further te sting or modi?ation. customers are requested not to export or re-export, directly or indirectly, the products to any country or any ent ity not in compliance with or in violation of the national export administration laws, treaties, orders and regulations. customers are req uested appropriately take steps to obtain required permissions or approvals from appropriate government agencies. seiko npc corporation 15-6, nihombashi-kabutocho, chuo-ku, tokyo 103-0026, japan telephone: +81-3-6667-6601 facsimile: +81-3-6667-6611 http://www.npc.co.jp/ email: sales @ npc.co.jp
|
